With the increasing use of portable battery-powered digital devices such as laptop computers, personal digital assistants and digital telephones, minimizing the power consumption of digital circuits becomes a more important issue. Several techniques are widely employed to reduce overall power consumption, including use of low power standby modes, dynamic circuit frequency reductions, and voltage reductions.
Determining the best combination of such techniques for reducing power, while not substantially interfering with user experience or software application reliability, is difficult. Various predictive scheduling techniques have been proposed that assign a frequency or predetermined supply voltage to each operation in a data flow graph of a software application so as to minimize the average energy consumption for given computation time or throughput constraints or both. Alternatively, self-timed circuits that lower the supply voltage until the microprocessor can just meet the specific performance requirement have been proposed. This approach scales supply voltage dynamically according to the quantity of processing data per unit time.
Unfortunately, predictive methods and self-timing circuits often provide suboptimal performance when applied to multimedia applications such as video or audio processing. To be useful, the prediction algorithms or timing circuitry must accurately predict future computational needs based on content data (such as contents of a MPEG frame). Even if the prediction is accurate, such an approach may require substantial extra processing (and therefore more energy) in order to generate the prediction.